Tim Willemse appointed a Full Professor Algorithms and Logics for Verification

24-Sep-2025

Starting from August 1, 2025 Tim Willemse has been appointed a Full Professor Algorithms and Logics for Verification at Eindhoven University of Technology. His research goal is to improve the quality and reliability of software-intensive systems. To this end, he studies logics and algorithms for reasoning about the behaviour of such systems, and he applies these to systems of industrial scale and complexity such as, e.g., the control software at the Large Hadron Collider at CERN and the proposed ERTMS railway standard. In the past he held part-time positions with CERN and TNO-ESI. Currently he is the chair of the Formal System Analysis group at Eindhoven University of Technology, and chair of the Industry Committee of Formal Methods Europe. He has won multiple best paper awards.